Hardware Implementation of IT2FLC using FPGA for Control Applications

  • Assist. Prof. Dr. Mohammed Y. Hassan University of Technology, Control and Systems Department, Baghdad, Iraq
  • Saif Faris Abulhail University of Technology, Control and Systems Department, Baghdad, Iraq
  • Lecturer Dr.Waleed Fawwaz Shareef University of Technology, Control and Systems Department, Baghdad, Iraq
Keywords: Footprint of uncertainty, Karnick Mendel, Enhanced Karnick Mendel, FPGA


Abstract: Interval Type2 Fuzzy Logic Control (IT2FLC) has been applied to a number of industrial, medical, home and military applications. Hardware implementation of IT2FLC can be achieved in a number of ways. One of these ways is the use of a Field Programmable Gate Array (FPGA).         In this paper, the design and implementation of an IT2FLC using FPGA has been presented. The proposed controller is of Mamdani type. It works in different structures (P/PI/PD/PID like IT2FLC) depending on two control lines, different number of triangular shape memberships (2-7) depending on three control lines, six tunable gains and within a range of sampling time of (0.01-1024) seconds. Three type reduction algorithms are used and it is found that the Enhanced Iterative Algorithm with Stop Condition (EIASC) produced the minimum reduction in FPGA size. Thus less execution time. The reduction size is about 75% than Karnick Mendel (KM) and is about 3% than Enhanced KM (EKM). Linear and nonlinear models are used to test the designed Controller. Gains are tuned manually to reach minimum overshoot, settling time and steady state error.                                                Simulation and Implementation results showed that the proposed controller works in an efficient way under no-load, load and uncertainty in the nonlinear model parameters.


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